Author ORCID Identifier
0000-0003-3621-0168
Document Type
Animation
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Publication Date
6-26-2023
Description
Figure 7.1: 8-bit positive edge-triggered register. Initially, the D flip-flops have outputs 10110110 and inputs 01011101. When CLK changes from 0 to 1, the outputs change to 01011101.
Recommended Citation
Carpinelli, John D., "Figure 7.1: 8-bit positive edge-triggered register." (2023). An Animated Introduction to Digital Logic Design - Animations. 87.
https://digitalcommons.njit.edu/dld-animations/87
Creative Commons License
This work is licensed under a Creative Commons Attribution-NonCommercial-Share Alike 4.0 International License.
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