Document Type
Thesis
Date of Award
5-31-1986
Degree Name
Master of Science in Electrical Engineering - (M.S.)
Department
Electrical Engineering
First Advisor
Kenneth Sohn
Second Advisor
Dale Thorpe Teaney
Abstract
A tightly coupled multiple-microprocessor with two MPU's that can be run at different clock speeds has been built and tested. The method of interconnection for this multiprocessor is a timeshared common bus with shared memories having a tightly coupled architecture. The signal timipg of the multiprocessor system for different speeds has been investigated using a logic analyzer for simulation modeling. The desired timing results have been obtained. According to the timing results, the simulation model for the General Purpose Simulation System has been correctly designed and performance of the multiprocessor system for the various clock speeds has been evaluated by using the General Purpose Simulation System (GPSS) program for a VAX/VMS mainframe computer.
Recommended Citation
Lee, Sang-Soo, "Design and evaluation of performance for the multi-microprocessor system" (1986). Theses. 3421.
https://digitalcommons.njit.edu/theses/3421
