Author ORCID Identifier
0000-0003-3621-0168
Document Type
Animation
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Publication Date
6-26-2023
Description
Figure 7.13: 16-bit shift register constructed from two 8-bit shift registers. Initially, SHIFT_IN of the most significant shift register is 0 and its output is 10110110, and the output of the least significant shift register is 01010011. When CLK changes from 0 to 1, the outputs change to 01011011 and 00101001.
Recommended Citation
Carpinelli, John D., "Figure 7.13: 16-bit shift register constructed from two 8-bit shift registers." (2023). An Animated Introduction to Digital Logic Design - Animations. 93.
https://digitalcommons.njit.edu/dld-animations/93
Creative Commons License
This work is licensed under a Creative Commons Attribution-NonCommercial-Share Alike 4.0 International License.
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