Figure 4.23: Half adder: (a) Inputs and outputs; (b) Truth table; (c) Internal design.

Author ORCID Identifier

0000-0003-3621-0168

Authors

John D. Carpinelli, New Jersey Institute of TechnologyFollow

Document Type

Animation

Publication Date

6-24-2023

Description

Figure 4.23: Half adder: (a) Inputs and outputs; (b) Truth table; (c) Internal design. The animation shows all possible values of inputs to the half adder and the outputs each set of input values generates.

Recommended Citation

Carpinelli, John D., "Figure 4.23: Half adder: (a) Inputs and outputs; (b) Truth table; (c) Internal design." (2023). An Animated Introduction to Digital Logic Design - Animations. 62.
https://digitalcommons.njit.edu/dld-animations/62

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