Figure 3.2: OR gates: (a) 2-input OR gate; (b) Truth table; (c) 3- and 4-input OR gates.

Author ORCID Identifier

0000-0003-3621-0168

Authors

John D. Carpinelli, New Jersey Institute of TechnologyFollow

Document Type

Animation

Publication Date

6-24-2023

Description

Figure 3.2: OR gates: (a) 2-input OR gate; (b) Truth table; (c) 3- and 4-input OR gates. The animation shows all possible values of inputs to the 2-input OR gate and the output each set of input values generates.

Recommended Citation

Carpinelli, John D., "Figure 3.2: OR gates: (a) 2-input OR gate; (b) Truth table; (c) 3- and 4-input OR gates." (2023). An Animated Introduction to Digital Logic Design - Animations. 34.
https://digitalcommons.njit.edu/dld-animations/34

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial-Share Alike 4.0 International License.