Figure 10.6: D flip-flop model of a 16x2 ROM. Buffer enable signals shown in green.

Author ORCID Identifier

0000-0003-3621-0168

Authors

John D. Carpinelli, New Jersey Institute of TechnologyFollow

Document Type

Animation

Publication Date

6-26-2023

Description

Figure 10.6: D flip-flop model of a 16x2 ROM. Buffer enable signals shown in green. The animation shows the asserted signals and data for A3-A2-A1-A0 = 0-1-0-0.

Recommended Citation

Carpinelli, John D., "Figure 10.6: D flip-flop model of a 16x2 ROM. Buffer enable signals shown in green." (2023). An Animated Introduction to Digital Logic Design - Animations. 128.
https://digitalcommons.njit.edu/dld-animations/128

Creative Commons License

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