Date of Award

Summer 1998

Document Type

Thesis

Degree Name

Master of Science in Computer Engineering - (M.S.)

Department

Electrical and Computer Engineering

First Advisor

John D. Carpinelli

Second Advisor

MengChu Zhou

Third Advisor

Edwin Hou

Abstract

Clos interconnection networks, used in data networks and computing systems, can contain extra switches to be used in faulty conditions. The speed of such fault tolerant Clos interconnection networks is improved through the use these switches in no-fault situations. The network can be represented by a matrix, which is then decomposed using an algorithm, and the switch settings are thus assigned.

The original decomposition algorithm consisted of four element swaps in the following order: wild swap, simple swap, next simple swap, and successive swap. However, by re-arranging these swaps with the simple swap first, followed by the next simple and successive swaps with the wild swap coming either before or after the next simple, the number of total swaps needed to fully decompose the matrix is significantly reduced.

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