Document Type
Thesis
Date of Award
5-31-1984
Degree Name
Master of Science in Electrical Engineering - (M.S.)
Department
Electrical Engineering
First Advisor
Kenneth Sohn
Second Advisor
K. Denno
Third Advisor
Raj Pratap Misra
Abstract
Multiple processor systems are the logical choice for applications demanding high computing power, throughput and reliability. Moderately coupled Multiple Microprocessor systems can be applied to a variety of applications demanding high performance. The structure of Multiple Microprocessor systems is examined. Various interconnection structures are analysed for performance comparisons.
Queueing theory is a powerful tool in modeling and analysing Computer systems. Queueing models are developed for popular Multiple processor interconnection topolog es like the Shared memory, Shared bus, Star and Loop configurations.
The usefulness of Digital computer Simulation techniques in estimating the performance of Multiple processor systems is demonstrated through a FORTRAN simulation of a Shared bus architecture. Simulation is a natural choice for performance analysis if measurement is not feasible and analytical techniques do not yield tangible solutions.
The advantage of considering performance explicitly during the design process is demonstrated through the analysis of two application examples.
The performance results obtained can aid the designer in the choice of the best architecture for a particular application.
Recommended Citation
Hariharan, Moorthy Narayana, "Performance modeling and simulation of multiple microcomputer systems" (1984). Theses. 3533.
https://digitalcommons.njit.edu/theses/3533
