Document Type

Thesis

Date of Award

5-31-1987

Degree Name

Master of Science in Electrical Engineering - (M.S.)

Department

Electrical Engineering

First Advisor

Raj Pratap Misra

Second Advisor

S. Pandey

Third Advisor

W. H. Warren Ball

Abstract

The primary objective of this thesis is to determine and analyze the failure mechanisms of Low Power Schottky microcircuit device (2-Input NAND Gate). Pinpoint the causes, and suggest the precautionary measures that prevent the occurrence of these failures. To achieve this goal, the study went in two directions, theoretical and experimental. The theoretical part is a comprehensive review of the work done on Low Power Schottky 2-Input NAND Gates since 1960 up to date.

The experimental part of the study is a life test ( 1000 hours ) of 2-Input NAND Gates under humidity and high temperature.

For each unit, two parameters are measured before and after the life test; input voltage, and leakage current. Both humidity and temperature were found to have profound effects on Gate behaviour.

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