Document Type
Thesis
Date of Award
1-31-1987
Degree Name
Master of Science in Electrical Engineering - (M.S.)
Department
Electrical Engineering
First Advisor
Michael Pratap Singh
Second Advisor
Harvinder Wason
Abstract
This thesis has two parts. The first part deals with the theoretical analysis and experimental verification of the variation of channel resistance and threshold voltage as a function of drain and source voltages in NMOS transistor with the substrate taken as reference. And the second part deals with simulation and optimization of the NMOS sense amplifier circuits.
Firstly, the NMOS transistor with the substrate taken as reference node is analysed and a set of formulas is derived for the variation of channel resistance as a function of the terminal voltages. Experimental results (using SCL 4007AE from Signetics) show good agreement with the theoretial results.
Later, the standard sense amplifier and a sense amplifier with imbalance voltage injected at load gates are studied in detail. Using SPICE simulator, all the parameters are optimized for both sense amplifiers. The performance of the two sense amplifiers with optimum parameter values are then compared.
Recommended Citation
Kim, Chang-Joo, "Modeling and simulation studies on NMOS VLSI" (1987). Theses. 3274.
https://digitalcommons.njit.edu/theses/3274
