Document Type
Thesis
Date of Award
5-31-1988
Degree Name
Master of Science in Electrical Engineering - (M.S.)
Department
Electrical Engineering
First Advisor
Michael Pratap Singh
Second Advisor
Kenneth Sohn
Abstract
Computer Aided Diagnosability Of Circuits (CADOC), a new method is developed for isolating and pin-pointing a faulty device in digital circuits. CADOC is based on graph-theoretic principle and PFD numbers. Without considering any SA1 or SAO faults, we can zoom out faulty device by selecting different diagnostic path to narrow down the faulty region and to isolate the faulty device. The efficiency of this new technique is confirmed by applying the technique to many examples.
Recommended Citation
Patel, Shirish, "Microprocessor testing and computer aided diagnosability of digital circuits" (1988). Theses. 3167.
https://digitalcommons.njit.edu/theses/3167
