Document Type

Thesis

Date of Award

8-31-1991

Degree Name

Master of Science in Electrical Engineering - (M.S.)

Department

Electrical and Computer Engineering

First Advisor

Walter F. Kosonocky

Second Advisor

Kenneth Sohn

Third Advisor

Durgamadhab Misra

Abstract

A process and device simulation study has been made to optimize a new type of buried channel CCD (BCCD) structure to be referred to as Graded BCCD (GBCCD) whose buried channel is formed by multiple implantations for achieving higher charge transfer efficiency. The 2-D process simulation tool SUPREM4 and 2-D device simulation tool PISCES2 were used in this research. The simulation results of the GBCCD with double channel implants are compared with the previously obtained experimental results.

Triple channel implants under the conditions of various process parameters were also simulated and the optimized case was chosen on the base of results. The device characteristics of the GBCCDs such as charge distribution, potential profile. pinning voltage and electric field have been fully investigated and studied.

Also in order to enhance the performance of PISCES2 a Fortran program that can calculate the number of electrons in the GBCCD channel and estimate their distribution area was successfully developed.

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