Document Type


Date of Award


Degree Name

Master of Science in Electrical Engineering - (M.S.)


Electrical Engineering

First Advisor

John D. Carpinelli

Second Advisor

Anthony D. Robbi

Third Advisor

Sotirios Ziavras


Multistage interconnection networks, or MINs, provide paths between functional modules in multiprocessor systems. The MINs are usually segmented into several stages. Each stage connects inputs to appropriate links of the next stage so that the cumulative effect of all the stages satisfies input-output connection requirements.

This thesis deals with a fault tolerant Clos network. The fault tolerance technique involves addition of extra switches per stage to compensate for any switch failure The reliability analysis of both ordinary and fault tolerant Clos networks is presented. The optimal number of extra switches required to get the best reliability results has been analyzed.



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