Document Type
Thesis
Date of Award
1-31-1991
Degree Name
Master of Science in Electrical Engineering - (M.S.)
Department
Electrical Engineering
First Advisor
John D. Carpinelli
Second Advisor
Anthony D. Robbi
Third Advisor
Sotirios Ziavras
Abstract
Multistage interconnection networks, or MINs, provide paths between functional modules in multiprocessor systems. The MINs are usually segmented into several stages. Each stage connects inputs to appropriate links of the next stage so that the cumulative effect of all the stages satisfies input-output connection requirements.
This thesis deals with a fault tolerant Clos network. The fault tolerance technique involves addition of extra switches per stage to compensate for any switch failure The reliability analysis of both ordinary and fault tolerant Clos networks is presented. The optimal number of extra switches required to get the best reliability results has been analyzed.
Recommended Citation
Ahluwalia, Preet Mohan S., "Fault tolerant clos network" (1991). Theses. 2353.
https://digitalcommons.njit.edu/theses/2353
