Dichotomy slot allocation: A low-jitter scheduling scheme for input-queued switches

Document Type

Conference Proceeding

Publication Date

12-1-2007

Abstract

Recently, jitter is becoming an important performance criterion in switch scheduling to accommodate many emerging real-time applications. Formerly proposed low-jitter scheduling algorithms decompose traffic demands into a weighted sum of permutation matrices and then schedule these decomposed permutation matrices. However, a port pair's appearance in these decomposed matrices may exceed their actual traffic demand. Such extra allocation may result in high jitter for a port pair. In order to smoothly schedule each port pair, we propose a novel scheduling algorithm termed as Dichotomy Slot Allocation (DSA). To achieve low jitter and small cell loss, DSA allocates slots to port pairs based on a designed Dichotomy Order. Both analysis and simulation results demonstrate that DSA achieves relatively lower jitter as compared to the state of the art. ©2007 IEEE.

Identifier

47649092534 (Scopus)

ISBN

[1424412064, 9781424412068]

Publication Title

2007 IEEE Workshop on High Performance Switching and Routing Hpsr

External Full Text Location

https://doi.org/10.1109/HPSR.2007.4281268

First Page

88

Last Page

93

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