A micro power sigma-delta A/D converter in 0.35-μM CMOS for low frequency applications

Document Type

Conference Proceeding

Publication Date

12-1-2007

Abstract

A very low-power single loop second order 12-bit sigma-delta (ΣΔ) A/D converter in 0.35-μm triple metal, double poly CMOS technology has been designed for low frequency applications. The A/D converter includes a second-order ΣΔ modulator together with a DSP circuit comprising of a cascade of CIC and FIR digital filters. The design was focused on the minimization of power dissipation of the modulator that operates from a single 2-4 V power supply. A reduction of the power dissipation is obtained through the optimization of modulator coefficients, switched-capacitor (SC) integrators, particularly the optimal design of two-stage fully differential Class AB operational transconductance (OTA) amplifiers, which employ circuits for higher noise rejection and control of common mode levels. Local bootstrapping circuits are used for switches in order to facilitate the appropriate signal switching in low-voltage region of operation. Unit capacitors are created using poly-poly structure available in 0.35-μm CMOS technology and employed in SC circuits. The design was simulated in all process corners for active and passive devices considering a -40°C to +120°C temperature range and ±10 % supply voltage variation. The modulator achieves a dynamic range of 77 dB at a Nyquist conversion rate of 2.5 kHz with an oversampling ratio of 128. The modulator occupies an active area of 0.9 mm 2 dissipating only 120 μW from 2-V supply. The entire A/D converter occupies a die are of 2.4 mm2. © 2007 IEEE.

Identifier

47949119232 (Scopus)

ISBN

[1424413028, 9781424413027]

Publication Title

2007 IEEE Long Island Systems Applications and Technology Conference Lisat

External Full Text Location

https://doi.org/10.1109/LISAT.2007.4312641

First Page

115

Last Page

121

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