Figure 7.5: 8-bit linear shift right register constructed using D flip-flops.

Author ORCID Identifier

0000-0003-3621-0168

Authors

John D. Carpinelli, New Jersey Institute of TechnologyFollow

Document Type

Animation

Publication Date

6-26-2023

Description

Figure 7.5: 8-bit linear shift right register constructed using D flip-flops. When CLK changes from 0 to 1, the outputs change from 10110110 to 01011011.

Recommended Citation

Carpinelli, John D., "Figure 7.5: 8-bit linear shift right register constructed using D flip-flops." (2023). An Animated Introduction to Digital Logic Design - Animations. 89.
https://digitalcommons.njit.edu/dld-animations/89

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