Figure 3.8: Implementing the function q = a'bc' + ac: (a) Original truth table; (b) Expanded truth table; (c) Digital logic circuit to implement this function.

Author ORCID Identifier

0000-0003-3621-0168

Authors

John D. Carpinelli, New Jersey Institute of TechnologyFollow

Document Type

Animation

Publication Date

6-24-2023

Description

Figure 3.8: Implementing the function q = a'bc' + ac: (a) Original truth table; (b) Expanded truth table; (c) Digital logic circuit to implement this function. The animation shows all possible values of inputs a, b, and c, and the outputs of the AND and OR gates generated by each set of input values.

Recommended Citation

Carpinelli, John D., "Figure 3.8: Implementing the function q = a'bc' + ac: (a) Original truth table; (b) Expanded truth table; (c) Digital logic circuit to implement this function." (2023). An Animated Introduction to Digital Logic Design - Animations. 40.
https://digitalcommons.njit.edu/dld-animations/40

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial-Share Alike 4.0 International License.