Document Type
Thesis
Date of Award
1-31-1993
Degree Name
Master of Science in Electrical Engineering - (M.S.)
Department
Electrical and Computer Engineering
First Advisor
N. M. Ravindra
Second Advisor
Kenneth Sohn
Third Advisor
Durgamadhab Misra
Abstract
Wet Thermal Oxidation of Silicon in VLSI is an extremely important step in the formation of field oxides. Understanding oxidation kinetics is critical for process reproducibility. The present study aims at gaining an insight into the oxidation kinetics through large experimental data at process temperatures of 800°C, 900°C, 1000°C and 1100°C with a bubbler temperature of 98°C. Oxides with thicknesses ranging from 100A to 7000A have been grown. Rate constants are obtained for the growth kinetics. Extensive characterization studies have been performed on MOS structures produced after wet oxidation.
In addition, porous silicon which assumes a growing significance in the field of SOI technology has been produced using chemical method. SOI technology with porous silicon as an insulator marks a new concept with growing interest in porous silicon as a replacement to GaAs technology in optoelectronic devices. Characterization studies have also been performed for porous silicon structures.
Recommended Citation
Gharia, Nilesh A., "Studies of wet thermal oxidation of silicon and porous silicon" (1993). Theses. 1758.
https://digitalcommons.njit.edu/theses/1758
