Scheduling for input-queued packet switches by a re-configurable parallel match evaluator

Authors

Spiridon F. Beldianu, Newark College of Engineering
Roberto Rojas-Cessa, Newark College of Engineering
Eiji Oki, The University of Electro-Communications
Sotirios G. Ziavras, Newark College of Engineering

Document Type

Article

Publication Date

4-1-2010

Abstract

A parallel match evaluator (PE) selects the most productive match for an input-queued (IQ) switch among several tested. However, current PE-based approaches use N fixed permutations out of possible N!, where N is the number of switch ports. A fixed permutation represents a permanent match between the inputs and outputs. To improve switching performance, this letter proposes a re-configurable PE (RPE) where permutations are selected according to traffic pattern, queue occupancy, or queuing times. This letter shows the performance improvement achieved with the proposed RPE. © 2006 IEEE.

Identifier

77950665017 (Scopus)

Publication Title

IEEE Communications Letters

External Full Text Location

https://doi.org/10.1109/LCOMM.2010.04.092440

ISSN

10897798

First Page

357

Last Page

359

Issue

4

Volume

14

Recommended Citation

Beldianu, Spiridon F.; Rojas-Cessa, Roberto; Oki, Eiji; and Ziavras, Sotirios G., "Scheduling for input-queued packet switches by a re-configurable parallel match evaluator" (2010). Faculty Publications. 6355.
https://digitalcommons.njit.edu/fac_pubs/6355