Bio-mimetic synaptic plasticity and learning in a sub-500 mV Cu/SiO2/W memristor

Document Type

Article

Publication Date

4-1-2020

Abstract

The computational efficiency of the human brain is believed to stem from the parallel information processing capability of neurons with integrated storage in synaptic interconnections programmed by local spike triggered learning rules such as spike timing dependent plasticity (STDP). The extremely low operating voltages (approximately 100 mV) used to trigger neuronal signaling and synaptic adaptation is believed to be a critical reason for the brain's power efficiency. We demonstrate the feasibility of spike triggered STDP behavior in a two-terminal Cu/SiO2/W memristive device capable of operating below 500 mV. We analyze the state-dependent nature of conductance updates in the device to develop a phenomenological model. Using the model, we evaluate the potential of such devices to generate precise spike times under supervised learning conditions and classify handwritten digits from the MNIST dataset in an unsupervised learning setting. The results form a promising step towards creating a low power synaptic device capable of on-chip learning.

Identifier

85082660981 (Scopus)

Publication Title

Microelectronic Engineering

External Full Text Location

https://doi.org/10.1016/j.mee.2020.111290

ISSN

01679317

Volume

226

Fund Ref

Indo-French Centre for the Promotion of Advanced Research

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