Image morphological operations by neural circuits

Document Type

Conference Proceeding

Publication Date

12-1-1989

Abstract

An approach to implementing neural computing with Boolean programmable logic is presented. A technique for the implementation of image morphological operations using a neural architecture is developed. Image morphological operations, by their very nature, involve repeated computations over large data structures. Parallelism appears to be a necessary attribute of a hardware system which can efficiently perform such image analysis tasks.

Identifier

0024946659 (Scopus)

Publication Title

Proceedings IEEE International Symposium on Circuits and Systems

ISSN

02714310

First Page

774

Last Page

777

Volume

2

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