Interface passivation by deuterium for nanoscale CMOS devices
Document Type
Conference Proceeding
Publication Date
12-1-2004
Abstract
Passivation of interfaces such as Si/SiO 2 and Si/HfO 2 (Si/high-k) by deuterium instead of hydrogen is getting significant attention for scaled CMOS devices. This paper introduces the various methods of deuterium incorporation at the interface including thermal annealing and deuterium implantation at the Si/SiO 2 interface when a thin oxide is grown on implanted silicon substrate. In case of annealing thermal budget is a limiting factor whereas for implantation, energy and implantation dose significantly influence the interface passivation. Interface passivation by hydrogen and deuterium implantation is discussed. Observed interface states at the Si/SiO 2 interface suggests an isotope effect where deuterium implanted devices yielded better interface results compared to that of hydrogen implanted devices. Transient enhanced diffusion of implanted hydrogen and deuterium is affected by the implantation damage. © 2004 IEEE.
Identifier
21644463764 (Scopus)
Publication Title
International Conference on Solid State and Integrated Circuits Technology Proceedings Icsict
First Page
792
Last Page
797
Volume
2
Recommended Citation
Kundu, T. and Misra, D., "Interface passivation by deuterium for nanoscale CMOS devices" (2004). Faculty Publications. 20074.
https://digitalcommons.njit.edu/fac_pubs/20074
