Traffic routing algorithm for serial superchip system customisation
Document Type
Article
Publication Date
1-1-1990
Abstract
A traffic routing algorithm is presented for system customisation of the serial superchip architectural. In modern signal processing and scientific computation, system reconfigurability is highly desired to achieve dynamic reconfiguration during system operation and static reconfiguration. For example, for defect/fault tolerance before system operation. The superchip architecture is aimed at achieving both dynamic and static reconfigurability. The algorithm introduced here is intended to help system designers customise a superchip (which may be partially good) at the systems level. The algorithm will optimally search for traffic routes according to the connectivity information extracted from system specification, while avoiding defective elements on the chip.
Identifier
0025247651 (Scopus)
Publication Title
IEE Proceedings E Computers and Digital Techniques
External Full Text Location
https://doi.org/10.1049/ip-e.1990.0006
ISSN
01437062
First Page
65
Last Page
73
Issue
1
Volume
137
Recommended Citation
Chen, W.; Mavor, J.; Denyer, P. B.; and Renshaw, D., "Traffic routing algorithm for serial superchip system customisation" (1990). Faculty Publications. 17767.
https://digitalcommons.njit.edu/fac_pubs/17767