Verilog-A compact model for a novel Cu/SiO2/W quantum memristor

Document Type

Conference Proceeding

Publication Date

10-20-2016

Abstract

In this paper, we develop a Verilog-A model for a memristive device that has shown non-volatile state transitions via half-integer quantized conductance states at room temperature and an on-off ratio of ∼ 103. The model captures the geometrical evolution of a nano-filament and maps it to conductance levels in the equivalent electrical circuit, thereby accurately capturing the DC I-V and transient response of the device. The suitability of the model for circuit simulations is illustrated via a 4 χ 4 crossbar array programming simulation in HSPICE which captures the multilevel programmability of the device.

Identifier

85015646982 (Scopus)

ISBN

[9781509008179]

Publication Title

International Conference on Simulation of Semiconductor Processes and Devices SISPAD

External Full Text Location

https://doi.org/10.1109/SISPAD.2016.7605174

First Page

169

Last Page

172

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