Title

Figure 8.33: Final circuit for the 3-bit Gray code sequence generator using a counter and a decoder.

Author ORCID Identifier

0000-0003-3621-0168

Authors

John D. Carpinelli, New Jersey Institute of TechnologyFollow

Document Type

Animation

Publication Date

6-26-2023

Description

Animation of figure 8.33.

Recommended Citation

Carpinelli, John D., "Figure 8.33: Final circuit for the 3-bit Gray code sequence generator using a counter and a decoder." (2023). An Animated Introduction to Digital Logic Design - Animations. 107.
https://digitalcommons.njit.edu/dld-animations/107

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial-Share Alike 4.0 International License.