Document Type
Dissertation
Date of Award
Fall 1-27-2008
Degree Name
Doctor of Philosophy in Electrical Engineering - (Ph.D.)
Department
Electrical and Computer Engineering
First Advisor
Roberto Rojas-Cessa
Second Advisor
Nirwan Ansari
Third Advisor
MengChu Zhou
Fourth Advisor
Aleksandar Kolarov
Fifth Advisor
Jie Hu
Abstract
Single-stage input-queued (IQ) switches are attractive for implementation of high performance routers because they require no speedup in the used memory. It has been shown that IQ switches can provide 100% throughput under admissible traffic when using either maximum-weight matching schemes or iterative maximal-weight matching schemes with a significant speedup. These different approaches require either high computation complexity or high memory costs that can make them infeasible. Therefore, there is a need for low-complexity and fast matching schemes that provide high throughput under several admissible traffic patterns, without recurring to speedup nor multiple iterations. In this thesis. the concept of captured frame is proposed, and the application of this concept to matching schemes is demonstrated. Two weightless matching schemes, one is based on round-robin selection, called uFORM, and the other is based on random selection, called uFPIM, are presented. Furthermore, the high throughput of these schemes using a single iteration and no speedup, under a variety of admissible traffic patterns, is shown.
As switch scalability is required in high-capacity switches, a Cbs-network architecture is considered. Clos-network switches are implemented with small switch modules to reduced the hardware complexity of large-capacity switches. However, the complexity of configuration schemes for these switches is high because of a) the distributed modules, and b) the high port count. This complexity can be reduced by adding memory to the first and third stages in a three-stage configuration. This switch is then called Memory-Space-Memory (MSM) switch. An effective dispatching scheme for MSM Clos-network switches must provide high throughput under any admissible traffic pattern, without expanding internal bandwidth, and while being simple to implement. To satisfy those requirements, two dispatching schemes are proposed for an MSM Cbs-network switch, the framed random dispatching (FRD) and the framed concurrent round-robin dispatching (FCRRD) schemes. It is shown that these schemes, using a single matching iteration, achieve high throughput under traffic with uniform and nonuniform distributions.
Although FRD and FCRRD are simple dispatching schemes, the memory used in the MSM Clos-network switch requires speedup. Therefore, an input-queued three-stage Clos-network (IQC) switch is considered. IQC switches use no memory switch modules and are free out-of-sequence forwarding that may occur in buffered Clos-network switches, however, they have greater scheduling complexity. The configuration of IQC switches involve port matching and path routing assignment, in that order. The implementation of a scheduler capable of matching thousands of ports in large size switches may have prohibitively large complexity. To decrease the scheduler complexity for large switches, a matching scheme, called the Module-First Matching (MoM), for IQC switches that hierarchizes the matching process is proposed. In a practical scenario, this scheme performs routing first and port matching thereafter. The high switching performance of the proposed approach under uniform and nonuniform traffic is presented. A practical two-stage Clos-network switch that uses module-first matching (MoM) scheme to improve the scalability and to reduce the configuration complexity for a very large scale switch, is also presented.
A new Clos-network switch that uses the crosspoint buffers in the third-stage modules and two matching schemes to configure the new Clos-network switch are proposed to reduce resolution time and provide high performance. This switch is called Space-Space-Memory (SSM) Clos-network switch. This switch needs no memory speedup in the third-stage modules. The two configuration schemes for SSM Clos-network switches are called the weighted module-first and none-port matching (WMF-NP), and the weighted central modules’ link matching (WCMM) schemes. These two approaches provide high performances for SSM Clos-network switches under uniform and nonuniform traffic, and WCMM can reduce the number of the exchange information between different modules.
Recommended Citation
Lin, Chuan-bi, "Design and analysis of scalable scheduling schemes for high-speed input-queued packet switches" (2008). Dissertations. 846.
https://digitalcommons.njit.edu/dissertations/846
