Document Type
Thesis
Date of Award
5-31-2026
Degree Name
Master of Science in Electrical Engineering - (M.S.)
Department
Electrical and Computer Engineering
First Advisor
Shaahin Angizi
Second Advisor
Dong Kyun Ko
Third Advisor
Anirudh Sridhar
Abstract
Conventional frame-based CMOS image sensors acquire full-frame pixel data at discrete time intervals, resulting in substantial spatial redundancy and loss of temporal information between frames. The repeated conversion and transfer of redundant pixel data increases bandwidth and power consumption in machine vision systems. Retinomorphic sensing architectures address these limitations by enabling programmable, analog-domain processing directly at the sensor interface. A compact behavioral model of the PbSe device is developed in HSPICE based on calibrated TCAD simulation data to capture gate-controlled photocurrent modulation under varying illumination and gate bias conditions. Error analysis is performed to quantify the deviation between TCAD-generated photocurrent characteristics and the circuit-level model to ensure simulation fidelity. To interface the crossbar array with CMOS circuitry, a mixed-signal front-end implemented in 180nm CMOS technology integrates a multi-bit DAC for gate programming, a high-value load resistor for passive current-to-voltage conversion, a transmission-gate sample-and-hold circuit, and a flash ADC for digitization. Simulation results validate end-to-end system operation and establish a circuit-level framework for programmable MWIR retinomorphic sensing, achieving over four to five orders of magnitude reduction in energy per frame compared to conventional cryogenically cooled MWIR imaging systems.
Recommended Citation
Nagaraju, Hemalatha, "Retinomorphic mid-wave infrared in-sensor processing engine: device-to-architecture co-design" (2026). Theses. 3554.
https://digitalcommons.njit.edu/theses/3554
Included in
Hardware Systems Commons, Semiconductor and Optical Materials Commons, Systems and Communications Commons, VLSI and Circuits, Embedded and Hardware Systems Commons
