An efficient synaptic architecture for artificial neural networks
Document Type
Conference Proceeding
Publication Date
12-8-2017
Abstract
Artificial neural networks (ANN) have revolutionized the field of machine learning by providing impressive human-like performance in solving real-world tasks in computer vision, speech recognition, or complex strategic games. There is a significant interest in developing non-von Neumann coprocessors for the training of ANNs, where resistive memory devices serve as synaptic elements. However, interdevice variability, limited dynamic range and resolution, nonlinearity and asymmetric switching characteristics pose important technical challenges. We investigate the use of multi-memristive synapses to overcome these challenges. We present a detailed experimental characterization of conductance changes using a phase-change memory chip fabricated in the 90nm technology node and show how multi-memrisive synapses can address the limitations of memristive devices for synaptic implementations. Simulations show that an ANN trained with backpropagation can achieve competitive classification accuracies using such a scheme.
Identifier
85046730737 (Scopus)
ISBN
[9781538604779]
Publication Title
2017 17th Non Volatile Memory Technology Symposium Nvmts 2017 Conference Proceedings
External Full Text Location
https://doi.org/10.1109/NVMTS.2017.8171302
First Page
1
Last Page
4
Volume
2017-December
Fund Ref
Schweizerischer Nationalfonds zur Förderung der Wissenschaftlichen Forschung
Recommended Citation
Boybat, Irem; Gallo, Manuel Le; Nandakumar, S. R.; Moraitis, Timoleon; Tuma, Tomas; Rajendran, Bipin; Leblebici, Yusuf; Sebastian, Abu; and Eleftheriou, Evangelos, "An efficient synaptic architecture for artificial neural networks" (2017). Faculty Publications. 9126.
https://digitalcommons.njit.edu/fac_pubs/9126
