Well-Posed Verilog-A Compact Model for Phase Change Memory
Document Type
Conference Proceeding
Publication Date
11-28-2018
Abstract
In this work, we demonstrate a well-posed compact model for phase change memory (PCM) devices based on Ge 2 Sb 2 Te 5 , (GST) chalcogenide. This model supports all modes of simulation including transient, DC, and AC. The model is developed in Verilog-A and simulated using HSPICE. It is computationally simple and successfully captures the key high level behaviors of memory switching, including the resistance dependence on programming voltages, currents and pulse time-scales.
Identifier
85059748220 (Scopus)
ISBN
[9781538667880]
Publication Title
International Conference on Simulation of Semiconductor Processes and Devices SISPAD
External Full Text Location
https://doi.org/10.1109/SISPAD.2018.8551667
First Page
369
Last Page
373
Volume
2018-September
Grant
1710009
Fund Ref
National Science Foundation
Recommended Citation
Kulkarni, Shruti R.; Kadetotad, Deepak Vinayak; Seo, Jae Sun; and Rajendran, Bipin, "Well-Posed Verilog-A Compact Model for Phase Change Memory" (2018). Faculty Publications. 8244.
https://digitalcommons.njit.edu/fac_pubs/8244
