A Novel Insight into the Vulnerability of DDR4 DRAM Cells Across Multiple Hammering Settings

Document Type

Article

Publication Date

1-1-2024

Abstract

RowHammer stands out as a prominent example, potentially the pioneering one, showcasing how a failure mechanism at the circuit level can give rise to a significant and pervasive security vulnerability within systems. Prior research has approached RowHammer attacks within a static threat model framework. Nonetheless, it warrants consideration within a more nuanced and dynamic model. This letter presents a low-overhead DRAM RowHammer vulnerability profiling technique, which utilizes innovative test vectors for categorizing memory cells into distinct security levels. The proposed test vectors intentionally weaken the spatial correlation between the aggressors and victim rows before an attack for evaluation, thus aiding designers in mitigating RowHammer vulnerabilities in the mapping phase. While there has been no previous research showcasing the impact of such profiling to our knowledge, our study methodically assesses 128 commercial DDR4 DRAM products. The results uncover the significant variability among chips from different manufacturers in the type and quantity of RowHammer attacks that can be exploited by adversaries.

Identifier

85211638256 (Scopus)

Publication Title

IEEE Embedded Systems Letters

External Full Text Location

https://doi.org/10.1109/LES.2024.3449232

e-ISSN

19430671

ISSN

19430663

First Page

337

Last Page

340

Issue

4

Volume

16

Grant

2228028

Fund Ref

National Science Foundation

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