FlexiDRAM: A Flexible in-DRAM Framework to Enable Parallel General-Purpose Computation

Document Type

Conference Proceeding

Publication Date

8-2-2022

Abstract

In this paper, we propose a Flexible processing-in-DRAM framework named FlexiDRAM that supports the efficient implementation of complex bulk bitwise operations. This framework is developed on top of a new reconfigurable in-DRAM accelerator that leverages the analog operation of DRAM sub-arrays and elevates it to implement XOR2-MAJ3 operations between operands stored in the same bit-line. FlexiDRAM first generates an efficient XOR-MAJ representation of the desired logic and then appropriately allocates DRAM rows to the operands to execute any in-DRAM computation. We develop ISA and software support required to compute in-DRAM operation. FlexiDRAM transforms current memory architecture to a massively parallel computational unit and can be leveraged to significantly reduce the latency and energy consumption of complex workloads. Our extensive circuit-to-architecture simulation results show that averaged across two well-known deep learning workloads, FlexiDRAM achieves ~15 energy-saving and 13 speedup over the GPU outperforming recent processing-in-DRAM platforms.

Identifier

85136247397 (Scopus)

ISBN

[9781450393546]

Publication Title

Proceedings of the International Symposium on Low Power Electronics and Design

External Full Text Location

https://doi.org/10.1145/3531437.3539721

ISSN

15334678

Grant

1710009

Fund Ref

International Studies Association

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