P-PIM: A Parallel Processing-in-DRAM Framework Enabling Row Hammer Protection

Document Type

Conference Proceeding

Publication Date

1-1-2023

Abstract

In this work, we propose a Parallel Processing-In-DRAM architecture named P-PIM leveraging the high density of DRAM to enable fast and flexible computation. P-PIM enables bulk bit-wise in-DRAM logic between operands in the same bit-line by elevating the analog operation of the memory sub-array based on a novel dual-row activation mechanism. With this, P-PIM can opportunistically perform a complete and inexpensive in-DRAM RowHammer (RH) self-tracking and mitigation technique to protect the memory unit against such a challenging security vulnerability. Our results show that P-PIM achieves 72% higher energy efficiency than the fastest charge-sharing-based designs. As for the RH protection, with a worst-case slowdown of 0.8%, P-PIM archives up to 71% energy-saving over the SRAM/CAM-based frameworks and about 90% saving over DRAM-based frameworks.

Identifier

85162665007 (Scopus)

ISBN

[9783981926378]

Publication Title

Proceedings Design Automation and Test in Europe Date

External Full Text Location

https://doi.org/10.23919/DATE56975.2023.10137204

ISSN

15301591

Volume

2023-April

Grant

2216772

Fund Ref

National Science Foundation

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