FPGA-based vector processing for solving sparse sets of equations
Document Type
Conference Proceeding
Publication Date
12-1-2005
Abstract
The solution to a set of sparse linear equations Ax = b, where A is an n×n sparse matrix and b is an n-element vector, can be obtained using the W-matrix method. An enhanced vector processor is implemented on an FPGA for this problem. Performance results are presented. The effect of pipelined multiple functional units, multiple data buses, instruction chaining, hardware synchronization, pipelined scattering, matrix density, and distribution of non-zero elements is analyzed. © 2005 IEEE.
Identifier
33746177726 (Scopus)
ISBN
[0769524451, 9780769524450]
Publication Title
Proceedings 13th Annual IEEE Symposium on Field Programmable Custom Computing Machines Fccm 2005
External Full Text Location
https://doi.org/10.1109/FCCM.2005.38
First Page
331
Last Page
332
Volume
2005
Recommended Citation
Hasan, Muhammad Z. and Ziavras, Sotirios G., "FPGA-based vector processing for solving sparse sets of equations" (2005). Faculty Publications. 19402.
https://digitalcommons.njit.edu/fac_pubs/19402
