Effect of BIST pretest on IC defect level

Document Type

Article

Publication Date

1-1-2006

Abstract

In [1] the impact of BIST on the chip defect level after test has been addressed. It was assumed in [1] that no measures are taken to ensure that the BIST circuitry is fault-free before launching the functional test. In this paper we assume that a BIST pretest is first conducted in order to get rid of all chips that fail it. Only chips whose BIST circuitry has passed the pretest are kept, while the rest are discarded. The BIST pretest, however, is assumed to have only a limited coverage against its own faults. This paper studies the product quality improvements as induced by the BIST pretest, and provides some insight as to when it may be worthwhile to perform it. Copyright © 2006 The Institute of Electronics, Information and Communication Engineers.

Identifier

33750073222 (Scopus)

Publication Title

IEICE Transactions on Information and Systems

External Full Text Location

https://doi.org/10.1093/ietisy/e89-d.10.2626

e-ISSN

17451361

ISSN

09168532

First Page

2626

Last Page

2636

Issue

10

Volume

E89-D

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