BIST pretest of ICs: Risks and benefits

Document Type

Conference Proceeding

Publication Date

11-22-2006

Abstract

The object of this paper is to analyze the potential benefits of conducting a BIST pretest before launching a functional test of ICs during post manufacturing screening. In [1] the impact of BIST on the chip defect level after test has been addressed. It was assumed in [1] that no measures are taken to assure that the BIST circuitry is fault-free before launching the functional test. In this paper we assume that a BIST pretest is first conducted in order to rid of all chips that fail it. Only chips whose BIST circuitry has passed the pretest are kept, while the rest are discarded. The BIST pretest, however, is assumed to have only a limited coverage against its own faults. This paper studies the product quality improvements as induced by the BIST pretest, and provides some insight as to when this pretest maybe worth-while performing. As the study shows, in many cases the potential benefits outweigh any potential risks. © 2006 IEEE.

Identifier

33751081853 (Scopus)

ISBN

[0769525148, 9780769525143]

Publication Title

Proceedings of the IEEE VLSI Test Symposium

External Full Text Location

https://doi.org/10.1109/VTS.2006.23

First Page

142

Last Page

147

Volume

2006

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