Determination of the optimum packet length and buffer sizes for the consumer electronics bus

Document Type

Article

Publication Date

1-1-1992

Abstract

This paper addresses two issues of the Consumer Electronics Bus (CEBus) implemented on the Power Line medium: the determination of (a) optimum packet length, and (b) optimum buffer size. The delay-throughput characteristics of each of the three priority classes of messages, i.e., HIGH, STANDARD, and DEFERRED, have been measured by simulation experiments for various packet lengths and buffer sizes. This way optimum packet length and buffer sizes have been deduced. The optimum packet length has been obtained by evaluating the effect of increasing packet size for a particular traffic pattern and offered load. The optimum buffer size at a node corresponds to the best overall performance for messages of all priorities in terms of overflow rates at the buffers of the nodes with respect to increasing offered loads. The optimum packet length has been found to be between 276 and 400 USTs, i.e., 184 and 276 bits. If we assign 276 USTs as the optimum packet length, the optimum buffer size at each node is found to be between 150 and 200 packets, i.e., approximately 28 to 37 Kbits. © 1992 IEEE

Identifier

0037977849 (Scopus)

Publication Title

IEEE Transactions on Consumer Electronics

External Full Text Location

https://doi.org/10.1109/30.179980

ISSN

00983063

First Page

884

Last Page

894

Issue

4

Volume

38

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