Powerful and feasible processor interconnections with an evaluation of their communications capabilities
Document Type
Article
Publication Date
12-1-1999
Abstract
Scalable networks with very good topological properties are often impossible to build because of their prohibitively high wiring complexity. Such a network is the generalized hypercube (GH). It supports full-connectivity of all its nodes in each dimension and is characterized by outstanding topological properties. We propose a new class of scalable interprocessor connections, namely HOWs (Highly-Overlapping Windows), capable of lower complexity than GHs and comparable performance. HOWs are obtained from GHs by removing edges to produce systems of lower wiring complexity. They contain numerous highly-overlapping GHs of smaller size. The classical GH belongs to this new class of interconnections. We demonstrate that 2-D HOWs perform much better than binary hypercubes for important communications patterns.
Identifier
0033366443 (Scopus)
Publication Title
Proceedings of the International Symposium on Parallel Architectures Algorithms and Networks I Span
ISSN
10874089
First Page
222
Last Page
227
Recommended Citation
Wang, Qian and Ziavras, Sotirios G., "Powerful and feasible processor interconnections with an evaluation of their communications capabilities" (1999). Faculty Publications. 15875.
https://digitalcommons.njit.edu/fac_pubs/15875
