Single-clock, single-latch, scan design

Document Type

Article

Publication Date

10-1-2003

Abstract

This correspondence describes a new single-latch scan design that uses a single clock for both scan and functional operations. A test mode signal differentiates between normal and test operations. This new design enjoys savings in circuits, pins, test time, and also enjoys the benefits of a high-speed scan capability.

Identifier

0242720743 (Scopus)

Publication Title

IEEE Transactions on Instrumentation and Measurement

External Full Text Location

https://doi.org/10.1109/TIM.2003.818550

ISSN

00189456

First Page

1455

Last Page

1457

Issue

5

Volume

52

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