Trapping in deep defects under substrate hot electron stress in TiN/Hf-silicate based gate stacks
Document Type
Article
Publication Date
1-1-2007
Abstract
Substrate hot electron stress was applied on n+-ringed n-channel MOS capacitors with TiN/Hf-silicate based gate stacks to study the role of O vacancy induced deep bulk defects in trapping and transport. For the incident carrier energies above the calculated O vacancy formation threshold, applied on MOS devices with the thick high-κ layer, both the flatband voltage shift due to electron trapping at the deep levels and the increase in leakage current during stress follow tn (n ≈ 0.4) power law dependence. Negative-U transitions to the deep levels are shown to be possibly responsible for the strong correlation observed between the slow transient trapping and the trap-assisted tunneling. © 2006 Elsevier Ltd. All rights reserved.
Identifier
33846615780 (Scopus)
Publication Title
Solid State Electronics
External Full Text Location
https://doi.org/10.1016/j.sse.2006.10.010
ISSN
00381101
First Page
102
Last Page
110
Issue
1
Volume
51
Grant
-0140584
Fund Ref
National Science Foundation
Recommended Citation
Chowdhury, N. A.; Srinivasan, P.; and Misra, D., "Trapping in deep defects under substrate hot electron stress in TiN/Hf-silicate based gate stacks" (2007). Faculty Publications. 13624.
https://digitalcommons.njit.edu/fac_pubs/13624
