Document Type


Date of Award

Spring 5-31-1995

Degree Name

Doctor of Philosophy in Electrical Engineering - (Ph.D.)


Electrical and Computer Engineering

First Advisor

Sotirios Ziavras

Second Advisor

Constantine N. Manikopoulos

Third Advisor

Edwin Hou

Fourth Advisor

Michael Abueg Palis

Fifth Advisor

Huifang Sun

Sixth Advisor

MengChu Zhou


Several DSP (Digital Signal Processing) algorithms are developed for the MIT TurboNet parallel computer. In contrast to other parallel computers that implement exclusively in hardware either the message-passing or the shared-memory communication paradigm, or employ distributed shared-memory architectures characterized by inefficient implementation of the shared-memory paradigm, the hybrid architecture of TurboNet supports direct, efficient implementation of both paradigms. Three versions of each algorithm are developed, if possible, corresponding to message-passing, shared-memory, and hybrid communications, respectively. Theoretical and experimental comparisons of algorithms are employed in the analysis of performance. The results prove that the hybrid versions generally achieve better performance than the other two versions. The main conclusion of this research is that small-scale and medium-scale parallel computers should implement directly in hardware both communication paradigms, for high performance, robustness in relation to the application space, and ease of algorithm development. To facilitate theoretical comparisons, a methodology is developed for highly accurate prediction of algorithm performance. The success of this methodology proves that such prediction is possible for complex parallel computers, such as TurboNet, if enough information is provided by the data dependence graphs.